1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a fabricating method of a poly crystalline thin film transistor that is used as a switching element of a liquid crystal display device.
2. Discussion of the Related Art
In the field of flat panel display (FPD), active matrix liquid crystal display (AMLCD) devices are widely used. In the LCD devices, a thin film transistor (TFT) is used as a switching element that manipulates the light transmittance of a pixel region by adjusting a voltage applied to a liquid crystal layer of the pixel region. These LCD devices are referred to as thin film transistor liquid crystal display (TFT-LCD) devices. Hydrogenated amorphous silicon (a-Si:H) is an easy material to be fabricated on a large area substrate with high productivity. Moreover, since the hydrogenated amorphous silicon is deposited at a temperature less than about 350° C., a substrate of low cost can be used. Therefore, the hydrogenated amorphous silicon is mainly used in the switching element, which is referred to as an amorphous silicon thin film transistor (a-Si TFT).
However, since the hydrogenated amorphous silicon has a disordered atomic arrangement in that weak silicon-silicon (Si—Si) bonds and dangling bonds exist in the hydrogenated amorphous silicon. These types of bonds become metastable when light or an electric field is applied to the hydrogenated amorphous silicon. As a result, this metastability makes the TFT unstable. Electrical characteristics of the hydrogenated amorphous silicon are especially degraded due to light irradiation. Further, a TFT using the hydrogenated amorphous silicon is hard to use in a driving circuit due to degraded electric characteristics such as a low field effect mobility between about 0.1 cm2/Vsec to about 1.0 cm2/Vsec, and poor reliability. Accordingly, the substrate including the a-Si TFT is connected with a printed circuit board (PCB) using a tape carrier package (TCP) that includes driving integrated circuit (IC). The driving IC and its packaging increase the production cost of an LCD device. Additionally, as the resolution of a liquid crystal panel for an LCD device increases, a pad pitch between gate pads or between data pads of the substrate including the a-Si TFT becomes smaller. Thus, bonding of the TCP and the substrate including the a-Si TFT becomes harder.
To solve these problems, a polycrystalline silicon thin film transistor (p-Si TFT) is suggested. Since a p-Si TFT has a higher field effect mobility than an a-Si TFT, a driving circuit can be simultaneously fabricated on the substrate including the a-Si TFT. Accordingly, the production cost can be reduced and the TCP is no longer needed. Moreover, p-Si TFT can be used as a switching element of a high-resolution panel to use the high field effect mobility of the polycrystalline silicon. Further, a p-Si TFT has a lower photo current than an a-Si TFT such that the display device can be exposed to a lot of light without substantially degrading electrical characteristics of the p-Si TFT.
A fabricating process of polycrystalline silicon can be classified into a low temperature crystallization process and a high temperature crystallization process. In the high temperature crystallization process, a high cost quartz substrate is required to be used because the process temperature is around 1000° C. that is above a strain temperature of a glass substrate. Moreover, since a polycrystalline silicon thin film fabricated through the high temperature crystallization process has a high surface roughness and a poor crystallinity (e.g., fine grain), a high temperature p-Si TFT has worse electrical characteristics than a low temperature p-Si TFT. Thus, the low temperature crystallization process in which polycrystalline silicon is obtained by crystallizing amorphous silicon at a low temperature has been widely researched and developed. The low temperature p-Si TFT-LCD device is the next generation technology having a better display quality, a higher reliability and a lower power consumption than the high temperature p-Si TFT-LCD.
Recently, among the low temperature crystallization processes, a metal induced crystallization (MIC) method, a metal induced lateral crystallization (MILC) method and a field enhanced metal induced crystallization (FE-MIC) method have been widely used and researched. The FE-MIC method has been highlighted as a crystallization method that can reduce required time and temperature for crystallization by applying a direct current (DC) high voltage to a silicon thin film treated with a catalyst metal.
FIGS. 1A to 1C are schematic perspective views illustrating a related art low temperature crystallization process using nickel (Ni) as a catalyst metal.
As shown in FIG. 1A, after a buffer layer 10 and an amorphous silicon (a-Si) layer 12 are sequentially formed on a substrate 1, a small amount of nickel (Ni) is adsorbed into the amorphous silicon layer 12 using one of deposition, coating and implantation.
The substrate 1 is heated to a temperature of less than about 500° C. and an electric field is simultaneously applied to metal electrodes 13 at both ends of the substrate 1 as shown in FIG. 1B. The small amount of nickel and silicon of the amorphous silicon layer 12 react to form nickel silicide (NiSix; x=0.5˜2) and crystallization is induced by the nickel silicide with effects of the heat and the electric field to thereby transform, the amorphous silicon layer 12 into a polycrystalline silicon layer (not shown).
In FIG. 1C, an active layer 20 is formed using a photolithographic process to patterning the polycrystalline silicon layer. For example, a photoresist (PR) pattern (not shown) is formed on the polycrystalline silicon layer through coating, exposure and development of photoresist (PR), and the polycrystalline silicon layer is etched by using the PR pattern as an etching mask, thereby the active layer 20. However, the nickel silicide at an interface between the buffer layer 10 and the active layer 20 remains as a nickel silicide residue 30 even after etching of the polycrystalline silicon layer. The nickel silicide residue 30 degrades the dielectric property of an insulating layer and generates defects along edges of the active layer 20, which degrades a subsequently produced TFT. For example, leakage currents can be generated at side portions of the active layer 20 that source and drain electrodes contact due to the nickel silicide residue 30. Moreover, a step coverage is degraded at an edge portion “A” along the active layer 20 due to the nickel silicide residue 30. The poor step coverage causes process inferiority, such as a lower pattern resolution.